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1 lt1180a/lt1181a 11801afb descriptio u features applicatio s u typical applicatio u low power 5v rs232 dual driver/receiver with 0.1 m f capacitors r output waveforms lt1180a ? ta02 driver output r l = 3k c l = 2500pf receiver output c l = 50pf input 5k 5k 0.1 f logic inputs logic outputs on/off 18 10 13 11 12 6 5 4 2 16 9 14 8 15 7 3 17 5v input v + out v out rs232 output rs232 output rs232 input rs232 input lt1180a ta01 lt1180a + 0.1 f + 0.1 f + 0.1 f + n esd protection over 10kv n uses small capacitors: 0.1 m f n 120kbaud operation for r l = 3k, c l = 2500pf n 250kbaud operation for r l = 3k, c l = 1000pf n outputs withstand 30v without damage n cmos comparable low power: 40mw n operates from a single 5v supply n rugged bipolar design n outputs assume a high impedance state when off or powered down n meets all rs232 specifications n available with or without shutdown n absolutely no latch-up n available in so package n portable computers n battery-powered systems n power supply generator n terminals n modems , ltc and lt are registered trademarks of linear technology corporation. transzorb is a registered trademark of general instruments, gsi the lt ? 1180a/lt1181a are dual rs232 driver/receiver pairs with integral charge pump to generate rs232 volt- age levels from a single 5v supply. these circuits feature rugged bipolar design to provide operating fault tolerance and esd protection unmatched by competing cmos designs. using only 0.1 m f external capacitors, these cir- cuits consume only 40mw of power, and can operate to 120k baud even while driving heavy capacitive loads. new esd structures on the chip allow the lt1180a/lt1181a to survive multiple 10kv strikes, eliminating the need for costly transzorbs ? on the rs232 line pins. the lt1180a/ lt1181a are fully compliant with eia rs232 standards. driver outputs are protected from overload, and can be shorted to ground or up to 30v without damage. during shutdown or power-off conditions, driver and receiver outputs are in a high impedance state, allowing line sharing. the lt1181a is available in 16-pin dip and so packages. the lt1180a is supplied in 18-pin dip and so packages for applications which require shutdown.
2 lt1180a/lt1181a 11801afb a u g w a w u w a r b s o lu t exi t i s supply voltage (v cc ) ................................................ 6v v + ........................................................................ 13.2v v C ...................................................................... C13.2v input voltage driver ........................................................... v C to v + receiver ............................................... C 30v to 30v on/off ................................................. C 0.3v to 12v output voltage driver ...................................... v + C 30v to v C + 30v receiver .................................... C 0.3v to v cc + 0.3v short-circuit duration v + ................................................................... 30 sec v C ................................................................... 30 sec driver output .............................................. indefinite receiver output .......................................... indefinite operating temperature range lt1180ai/lt1181ai .......................... C 40 c to 85 c lt1180ac/lt1181ac ............................. 0 c to 70 c storage temperature range ................ C 65 c to 150 c lead temperature (soldering, 10 sec)................. 300 c wu u package / o rder i for atio order part number order part number e lectr ic al c c hara terist ics parameter conditions min typ max units power supply generator v + output 7.9 v v C output C 7.0 v supply current (v cc ) (note 3), t a = 25 c913ma l 16 ma supply current when off (v cc ) shutdown (note 4) lt1180a only l 110 m a supply rise time c1 = c2 = c3 = c4 = 0.1 m f 0.2 ms shutdown to turn-on lt1180a only 0.2 ms on/off pin thresholds input low level (device shutdown) l 0.8 1.2 v input high level (device enabled) l 1.6 2.4 v t jmax = 125 c, q ja = 90 c/ w, q jc = 46 c/w (n) t jmax = 125 c, q ja = 95 c/ w, q jc = 27 c/w (sw) lt1181acn lt1181acsw lt1181ain lt1181aisw lt1181amj lt1180acn lt1180acsw lt1180ain lt1180aisw lt1180amj t jmax = 125 c, q ja = 80 c/ w, q jc = 36 c/w (n) t jmax = 125 c, q ja = 90 c/ w, q jc = 26 c/w (sw) 1 2 3 4 5 6 7 8 9 top view 18 17 16 15 14 13 12 11 10 nc c1 + v + c1 c2 + c2 v tr2 out rec2 in n package 18-lead pdip on/off v cc gnd tr1 out rec1 in rec1 out tr1 in tr2 in rec2 out sw package 18-lead plastic so (wide) 1 2 3 4 5 6 7 8 top view 16 15 14 13 12 11 10 9 c1 + v + c1 c2 + c2 v tr2 out rec2 in v cc gnd tr1 out rec1 in rec1 out tr1 in tr2 in rec2 out n package 16-lead pdip sw package 16-lead plastic so (wide) (note 1) consult ltc marketing for parts specified with wider operating temperature ranges. j package 18-lead cerdip t jmax = 150 c, q ja = 100 c/w, q jc = 40 c/w (j) obsolete package consider n package for alternate source the l denotes specifications which apply over the operating temperature range (0 c t a 70 c for commercial grade, and C 40 c t a 85 c for industrial grade. (note 2) j package 16-lead cerdip t jmax = 150 c, q ja = 100 c/w, q jc = 40 c/w (j) obsolete package consider n package for alternate source
3 lt1180a/lt1181a 11801afb e lectr ic al c c hara terist ics the l denotes specifications which apply over the operating temperature range (0 c t a 70 c for commercial grade, and C 40 c t a 85 c for industrial grade. (note 2) note 1: absolute maximum ratings are those values beyond which the life of the device may be impaired. note 2: testing done at v cc = 5v and v on/off = 3v, unless otherwise specified. note 3: supply current is measured as the average over several charge pump cycles. c + = c C = c1 = c2 = 0.1 m f. all outputs are open, with all driver inputs tied high. note 4: supply current measurements in shutdown are performed with v on/off 0.1v. note 5: for driver delay measurements, r l = 3k and c l = 51pf. trigger points are set between the drivers input logic threshold and the output transition to the zero crossing (t hl = 1.4v to 0v and t lh = 1.4v to 0v). note 6: for receiver delay measurements, c l = 51pf. trigger points are set between the receivers input logic threshold and the output transition to standard ttl/cmos logic threshold (t hl = 1.3v to 2.4v and t lh = 1.7v to 0.8v). note 7: data rate operation guaranteed by slew rate, short-circuit current and propagation delay tests. parameter conditions min typ max units on/off pin current 0v v on/off 5v l C15 80 m a oscillator frequency 130 khz driver output voltage swing load = 3k to gnd positive 5.0 7.5 v negative l C 6.3 C 5.0 v logic input voltage level input low level (v out = high) l 1.4 0.8 v input high level (v out = low) l 2.0 1.4 v logic input current 0.8v v in 2.0v l 520 m a output short-circuit current v out = 0v 917 ma output leakage current shutdown v out = 30v (note 4) l 10 100 m a date rate (note 7) r l = 3k, c l = 2500pf 120 kbaud r l = 3k, c l = 1000pf 250 kbaud slew rate r l = 3k, c l = 51pf 15 30 v/ m s r l = 3k, c l = 2500pf 47 v/ m s propagation delay output transition t hl high-to-low (note 5) 0.6 1.3 m s output transition t lh low-to-high 0.5 1.3 m s receiver input voltage thresholds input low threshold (v out = high) c grade l 0.8 1.3 v input high threshold (v out = low) c grade l 1.7 2.4 v input lowi, m grade l 0.2 1.3 v input highi, m grade l 1.7 3.0 v hysteresis l 0.1 0.4 1.0 v input resistance v in = 10v 3 5 7 k w output leakage current shutdown (note 4) 0 v out v cc l 110 m a output voltage output low, i out = C 1.6ma l 0.2 0.4 v output high, i out = 160 m a (v cc = 5v) l 3.5 4.2 v output short-circuit current sinking current, v out = v cc C20 C 10 ma sourcing current, v out = 0v 10 20 ma propagation delay output transition t hl high-to-low (note 6) 250 600 ns output transition t lh low-to-high 350 600 ns
4 lt1180a/lt1181a 11801afb cc hara terist ics uw a t y p i ca lper f o r c e receiver input thresholds supply current driver leakage in shutdown temperature (?) ?5 0.50 threshold voltage (v) 0.75 1.25 1.50 1.75 3.00 2.25 0 50 75 lt1180a ?tpc04 1.00 2.50 2.75 2.00 ?5 25 100 125 input high input low supply current vs data rate on/off thresholds temperature (?) ?5 threshold voltage (v) 2.0 2.5 3.0 25 75 lt1180a ?tpc06 1.5 1.0 ?5 0 50 100 125 0.5 0 on threshold off threshold temperature (?) 0.1 leakage current ( m a) 10 100 lt1180a ?tpc08 1 ?5 0 50 75 ?5 25 100 125 v out = 30v v out = 30v driver short-circuit current data rate (kbaud) 0 0 supply current (ma) 10 20 30 40 50 25 50 75 100 lt1180a ?tpc05 125 150 2 drivers active r l = 3k c l = 2500pf temperature (?) ?5 0 supply current (ma) 10 25 0 50 75 lt1180a ?tpc07 5 20 15 ?5 25 100 125 2 drivers loaded r l = 3k 1 driver loaded r l = 3k no load driver output voltage driver maximum output voltage vs load capacitance temperature (?) ?5 ?0 driver output voltage (v) ? ? ? 0 10 4 0 50 75 lt1180a ?tpc03 ? 6 8 2 ?5 25 100 125 output high output low r l = 3k v cc = 5v v cc = 4.5v v cc = 5.5v v cc = 4.5v v cc = 5v v cc = 5.5v load capacitance (nf) 0 5.0 peak output voltage (v) 5.5 6.0 6.5 7.0 7.5 8.0 2468 lt1180a ?tpc01 10 13579 20kbaud 60kbaud 120kbaud load capacitance (nf) 0 7.0 peak output voltage (v) 6.5 6.0 5.5 5.0 4.5 4.0 2468 lt1180a ?tpc02 10 13579 120kbaud 60kbaud 20kbaud driver minimum output voltage vs load capacitance temperature ( c) ?5 short-circuit current (ma) 20 25 30 25 75 lt1180a ?tpc09 15 10 ?5 0 50 100 125 5 0 i sc + i sc
5 lt1180a/lt1181a 11801afb cc hara terist ics uw a t y p i ca lper f o r c e load capacitance (nf) 0 slew rate (v/?) 12 16 4.0 lt1180a ?tpc11 8 4 0 1.0 2.0 3.0 5.0 10 14 6 2 3.5 0.5 1.5 2.5 4.5 +slew slew lt1180a ? tpc13 lt1180a ? tpc12 input driver output r l = 3k driver output r l = 3k c l = 2500pf driver 1 output on/off pin shutdown to driver outputs driver output waveforms 10v 5v gnd gnd C 10v C5v driver 2 output slew rate vs load capacitance receiver short-circuit current pi fu ctio s u uu v + : positive supply output (rs232 drivers). v + ? 2v cc C 1.5v. this pin requires an external charge storage capaci- tor c 3 0.1 m f, tied to ground or v cc . larger value capaci- tors may be used to reduce supply ripple. with multiple transceivers, the v + and v C pins may be paralleled into common capacitors. v C : negative supply output (rs232 drivers). v C ? C(2v cc C 2.5v). this pin requires an external charge storage capacitor c 3 0.1 m f. larger value capacitors may be used to reduce supply ripple. with multiple transceivers, the v + and v C pins may be paralleled into common capacitors. temperature ( c) ?5 0 short-circuit current (ma) 20 50 0 50 75 lt1180a ?tpc10 10 40 30 ?5 25 100 125 rx i sc rx i sc + v cc : 5v input supply pin. this pin should be decoupled with a 0.1 m f ceramic capacitor close to the package pin. insufficient supply bypassing can result in low output drive levels and erratic charge pump operation. gnd: ground pin. on/off: a ttl/cmos compatible operating mode con- trol. a logic low puts the lt1180a in shutdown mode. supply current drops to zero and both driver and receiver outputs assume a high impedance state. a logic high fully enables the device.
6 lt1180a/lt1181a 11801afb pi fu ctio s u uu tr1 in, tr2 in: rs232 driver input pins. these inputs are ttl/cmos compatible. inputs should not be allowed to float. tie unused inputs to v cc . tr1 out, tr2 out: driver outputs at rs232 voltage levels. driver output swing meets rs232 levels for loads up to 3k. slew rates are controlled for lightly loaded lines. output current capability is sufficient for load conditions up to 2500pf. outputs are in a high impedance state when in shutdown mode, v cc = 0v, or when the driver disable pin is active. outputs are fully short-circuit protected from v C + 30v to v + C 30v. applying higher voltages will not damage the device if the overdrive is moderately current limited. short circuits on one output can load the power supply generator and may disrupt the signal levels of the other outputs. the driver outputs are protected against esd to 10kv for human body model discharges. rec1 in, rec2 in: receiver inputs. these pins accept rs232 level signals ( 30v) into a protected 5k terminating resistor. the receiver inputs are protected against esd to 10kv for human body model discharges. each receiver provides 0.4v of hysteresis for noise immunity. open receiver inputs assume a logic low state. rec1 out, rec2 out: receiver outputs with ttl/cmos voltage levels. outputs are in a high impedance state when in shutdown mode to allow data line sharing. outputs are fully short-circuit protected to ground or v cc with the power on, off or in the shutdown mode. c1 + , c1 C , c2 + , c2 C : commutating capacitor inputs. these pins require two external capacitors c 3 0.1 m f: one from c1 + to c1 C and another from c2 + to c2 C . c1 should be deleted if a separate 12v supply is available and con- nected to pin c1 + . similarly, c2 should be deleted if a separate C 12v supply is connected to pin v C . esd test circuit esd protectio u the rs232 line inputs of the lt1180a/lt1181a have on- chip protection from esd transients up to 10kv. the protection structures act to divert the static discharge safely to system ground. in order for the esd protection to function effectively, the power supply and ground pins of the circuit must be connected to ground through low impedances. the power supply decoupling capacitors and charge pump storage capacitors provide this low imped- ance in normal application of the circuit. the only con- straint is that low esr capacitors must be used for bypassing and charge storage. esd testing must be done with pins v cc , v l , v + , v C , and gnd shorted to ground or connected with low esr capacitors. lt1180a ?esd tc rs232 line pins protected to 10kv 1 2 3 4 5 6 7 8 9 18 17 16 15 14 13 12 11 10 0.1 f 0.1 f nc c1 + v + c1 c2 + c2 v dr2 out lt1180a on/off 5v v cc gnd dr1 out rx1 in rx1 out dr1 in dr2 in rs232 line pins protected to 10kv rx2 in rx2 out + 0.1 f + 0.1 f 0.1 f + + +
7 lt1180a/lt1181a 11801afb u a o pp l ic at i ty p i ca l 30k 30k rs232 output rs232 output rs232 input rs232 input lt1180a ta04 lt1039 ttl input 30k rs232 input v cc ttl input ttl input ttl output ttl output ttl output on/off rs232 output 5k rs232 output rs232 input lt1180a ttl input 5k rs232 input v cc ttl input ttl output ttl output on/off rs232 output 2 4 5 6 3 7 18 17 gnd 16 gnd 10 v + v 1 9 18 17 5v shutdown c2 c2 + c1 c1 + v + v 11 12 13 10 15 14 9 8 12 14 16 11 13 15 7 5 3 8 6 4 1 f 1 f 1 f 1 f + + + + supporting an lt1039 (triple driver/receiver)
8 lt1180a/lt1181a 11801afb package descriptio u j18 1298 0.015 ?0.060 (0.380 ?1.520) 0.100 (2.54) bsc 0.014 ?0.026 (0.360 ?0.660) 0.045 ?0.065 (1.143 ?1.651) 0.200 (5.080) max 0.125 (3.175) min 0.008 ?0.018 (0.203 ?0.457) 0 ?15 1 2 3 4 56 78 0.220 ?0.310 (5.590 ?7.870) 0.960 (24.384) max 0.005 (0.127) min 16 13 9 10 11 12 14 15 17 18 0.025 (0.635) rad typ 0.300 bsc (0.762 bsc) 0.045 ?0.068 (1.143 ?1.727) full lead option 0.023 ?0.045 (0.584 ?1.143) half lead option corner leads option (4 plcs) note: lead dimensions apply to solder dip/plate or tin plate leads j16 1298 0.015 ?0.060 (0.380 ?1.520) 0.100 (2.54) bsc 0.014 ?0.026 (0.360 ?0.660) 0.045 ?0.065 (1.143 ?1.651) 0.200 (5.080) max 0.125 (3.175) min 0.008 ?0.018 (0.203 ?0.457) 0 ?15 1 23 4 5 6 78 0.220 ?0.310 (5.588 ?7.874) 0.840 (21.336) max 0.005 (0.127) min 16 13 9 10 11 12 14 15 0.025 (0.635) rad typ 0.300 bsc (0.762 bsc) 0.045 ?0.068 (1.143 ?1.727) full lead option 0.023 ?0.045 (0.584 ?1.143) half lead option corner leads option (4 plcs) note: lead dimensions apply to solder dip/plate or tin plate leads j package 16-lead cerdip (narrow .300 inch, hermetic) (reference ltc dwg # 05-08-1110) j package 18-lead cerdip (narrow .300 inch, hermetic) (reference ltc dwg # 05-08-1110) obsolete packages
9 lt1180a/lt1181a 11801afb package descriptio u n16 1098 0.255 0.015* (6.477 0.381) 0.770* (19.558) max 16 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 0.020 (0.508) min 0.125 (3.175) min 0.130 0.005 (3.302 0.127) 0.065 (1.651) typ 0.045 ?0.065 (1.143 ?1.651) 0.018 0.003 (0.457 0.076) 0.100 (2.54) bsc 0.009 ?0.015 (0.229 ?0.381) 0.300 ?0.325 (7.620 ?8.255) 0.325 +0.035 0.015 +0.889 0.381 8.255 () *these dimensions do not include mold flash or protrusions. mold flash or protrusions shall not exceed 0.010 inch (0.254mm) n18 1098 0.020 (0.508) min 0.125 (3.175) min 0.130 0.005 (3.302 0.127) 0.065 (1.651) typ 0.045 ?0.065 (1.143 ?1.651) 0.018 0.003 (0.457 0.076) 0.005 (0.127) min 0.100 (2.54) bsc 0.255 0.015* (6.477 0.381) 0.900* (22.860) max 18 12 3 4 56 7 8 9 10 11 12 13 14 16 15 17 0.009 ?0.015 (0.229 ?0.381) 0.300 ?0.325 (7.620 ?8.255) 0.325 +0.035 0.015 +0.889 0.381 8.255 () *these dimensions do not include mold flash or protrusions. mold flash or protrusions shall not exceed 0.010 inch (0.254mm) n package 16-lead pdip (narrow .300 inch) (reference ltc dwg # 05-08-1510) n package 18-lead pdip (narrow .300 inch) (reference ltc dwg # 05-08-1510)
10 lt1180a/lt1181a 11801afb package descriptio u s16 (wide) 1098 note 1 0.398 ?0.413* (10.109 ?10.490) 16 15 14 13 12 11 10 9 1 23 4 5 6 78 0.394 ?0.419 (10.007 ?10.643) 0.037 ?0.045 (0.940 ?1.143) 0.004 ?0.012 (0.102 ?0.305) 0.093 ?0.104 (2.362 ?2.642) 0.050 (1.270) bsc 0.014 ?0.019 (0.356 ?0.482) typ 0 ?8 typ note 1 0.009 ?0.013 (0.229 ?0.330) 0.016 ?0.050 (0.406 ?1.270) 0.291 ?0.299** (7.391 ?7.595) 45 0.010 ?0.029 (0.254 ?0.737) note: 1. pin 1 ident, notch on top and cavities on the bottom of packages are the manufacturing options. the part may be supplied with or without any of the options dimension does not include mold flash. mold flash shall not exceed 0.006" (0.152mm) per side dimension does not include interlead flash. interlead flash shall not exceed 0.010" (0.254mm) per side * ** sw package 16-lead plastic small outline (wide .300 inch) (reference ltc dwg # 05-08-1620)
11 lt1180a/lt1181a 11801afb package descriptio u information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights. s18 (wide) 1098 note 1 0.447 ?0.463* (11.354 ?11.760) 15 14 13 12 11 10 16 9 1 23 4 5 6 78 0.394 ?0.419 (10.007 ?10.643) 17 18 0.037 ?0.045 (0.940 ?1.143) 0.004 ?0.012 (0.102 ?0.305) 0.093 ?0.104 (2.362 ?2.642) 0.050 (1.270) bsc 0.014 ?0.019 (0.356 ?0.482) typ 0 ?8 typ note 1 0.009 ?0.013 (0.229 ?0.330) 0.016 ?0.050 (0.406 ?1.270) 0.291 ?0.299** (7.391 ?7.595) 45 0.010 ?0.029 (0.254 ?0.737) note: 1. pin 1 ident, notch on top and cavities on the bottom of packages are the manufacturing options. the part may be supplied with or without any of the options dimension does not include mold flash. mold flash shall not exceed 0.006" (0.152mm) per side dimension does not include interlead flash. interlead flash shall not exceed 0.010" (0.254mm) per side * ** sw package 18-lead plastic small outline (wide .300 inch) (reference ltc dwg # 05-08-1620)
12 lt1180a/lt1181a 11801afb ? linear technology corporation 1994 lt/cpi 11/01 rev b 1.5k ? printed in usa u a o pp l ic at i ty p i ca l part number description comments lt1280a/lt1281a 5v 2-driver/2-receiver rs232 transceivers pin compatible with lt1180a/lt1181a, i cc = 10ma max lt1381 5v 2-driver/2-receiver rs232 transceiver narrow 16-pin so package lt1780/lt1781 5v 2-driver/2-receiver rs232 transceivers iec 1000-4-2 level 4 compliance operation using 5v and 12v power supplies related parts 5k 5k logic inputs logic outputs on/off 18 10 13 11 12 6 5 4 2 16 9 14 8 15 7 3 17 5v input 12v out rs232 output rs232 output rs232 input rs232 input lt1180a ta03 lt1180a 12v input 0.1 f + 0.1 f + linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 l fax: (408) 434-0507 l www.linear.com

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